The background description includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
All publications herein are incorporated by reference to the same extent as if each individual publication or patent application were specifically and individually indicated to be incorporated by reference. Where a definition or use of a term in an incorporated reference is inconsistent or contrary to the definition of that term provided herein, the definition of that term provided herein applies and the definition of that term in the reference does not apply.
Data saved on memory can be accessed via a byte-addressable means, which allows for rapid access with an optimized memory space but more processing power. Memory can also be accessed via a block-addressable means, which allows for rapid access with less processing power but a non-optimized memory space. Since non-volatile memory tends to be slower than volatile memory, non-volatile memory is traditionally accessed via only block-addressable means.
U.S. Pat. No. 6,850,438 to Lee teaches a combination EEPROM and Flash memory in one chip. Lee's Flash memory is block-erasable and stores data having less frequent update rates while the EEPROM memory is byte-erasable and stores data with a high update frequency rate, allowing data to be written to the EEPROM while the data is read from the Flash memory simultaneously. Lee's chip, however, fails to utilize the rapid speeds of volatile memory, which prevents its chip from being used in ultra-high-speed embodiments. In addition, Lee's system only allows data to be transferred to/from each memory, and does not allow data to be rapidly transmitted from one memory to another directly within Lee's chip itself.
U.S. Pat. No. 9,208,071 to Talagala teaches a volatile, natively byte-addressable auto-commit memory that writes the contents of the byte-addressable volatile memory media to non-byte-addressable memory media of the auto-commit memory in response to a trigger event. Talagala's system, however, utilizes a traditional system bus to commit data from the volatile memory buffer to the non-volatile backing media, which requires OS drivers to be written and utilized for transmitting data from Talagala's volatile byte-addressable memory to its non-volatile block-addressable memory.
Thus, there remains a need for a system and method to rapidly utilize both block-addressable and byte-addressable means within a single memory solution.